stax

Store Atomic

stax RS,RA,RB

Performs an atomic update to an aligned memory location based on the function code (FC) specified.

Details

Performs an atomic store or atomic update operation at an address computed from RA+RB, with the operation type and memory ordering specified by an embedded function code. The instruction atomically writes or updates the target memory location based on the function code. Alignment requirements and privilege restrictions may apply.

Pseudocode Operation

EA ← RA + RB
# Atomic store/update of RS to [EA] with semantics determined by FC

Programming Note

For word atomics, only the least significant word of each source register is used.

Example

stax r3, r4, r5

Encoding

Binary Layout
18
0
RS
6
RA
11
RB
16
FC
21
 
Format X-form
Opcode
Extension Base

Operands

  • RS
    Source General Purpose Register
  • RA
    Base Address General Purpose Register
  • RB
    Offset General Purpose Register