dcread
Data Cache Read
dcread RT, RA, RB
Reads a data cache tag or data (Debug).
Encoding
Binary Layout
31
0:5
RT
6:10
RA
11:15
RB
16:20
486
21:30
/
31
Operands
-
RT
Target -
RA
Base -
RB
Index
Example
dcread r3, r4, r5
Related
More in Embedded
Reference
View in PowerISA v3.1C Specification ↗
OPF Power ISA v3.1C
Description
Reads and returns a data cache tag or data value from the address RA + RB into register RT. This is an embedded debug/diagnostic instruction used to inspect data cache contents; exact behavior (tag vs. data read, selection mechanism) is implementation-dependent. The instruction requires supervisor privilege and may not be available on all embedded PowerPC implementations.
Operation
addr ← (RA) + (RB)
RT ← Read data cache entry at addr