stvehx
Store Vector Element Halfword Indexed X-form
stvehx VRS,RA,RB
Stores a halfword element from a vector register to memory.
Details
Stores a halfword (16 bits) element from vector register VRS to memory at the indexed address (RA|0) + RB. The element is selected based on the least significant bits of the effective address to determine alignment. This is a VMX/AltiVec instruction that accesses memory with vector element granularity.
Pseudocode Operation
EA ← (RA|0) + RB
element_index ← EA[61:62]
[EA & ~0x1] ← VRS[element_index * 16 : element_index * 16 + 15]
Programming Note
Unless bits 60:62 of the address are known to match the halfword offset of the subject halfword element in VSR[VRS+32], software should use Vector Splat to splat the subject halfword element before performing the store.
Example
stvehx v1, r4, r5
Encoding
Binary Layout
011111
0
VRS
6
RA
11
RB
16
00101
21
00111
26
Rc
31
Operands
-
VRS
Vector Register -
RA
Source General Purpose Register -
RB
Source General Purpose Register