xxmrgld

VSX Vector Merge Low Doubleword

xxmrgld XT, XA, XB

Merges low doublewords from XA and XB.

Details

The xxmrgld instruction merges the low doubleword of two VSX registers into a target register. If DM.bit[1]=0, the contents of doubleword element 0 of VSR[XB] are placed into doubleword element 1 of VSR[XT]. Otherwise, the contents of doubleword element 1 of VSR[XB] are placed into doubleword element 1 of VSR[XT].

Pseudocode Operation

if MSR.VSX=0 then VSX_Unavailable()
VSR[32×TX+T].dword[0] ←VSR[32×AX+A].dword[DM.bit[0]]
VSR[32×TX+T].dword[1] ←VSR[32×BX+B].dword[DM.bit[1]]

Programming Note

The xxmrgld instruction is used to merge the low doublewords of two VSX registers into a target register. Ensure that the VSX facility is enabled by checking and setting the appropriate bit in the MSR register. Be cautious with the DM bits as they determine which doubleword from the source registers is placed into the target register's second doubleword position.

Example

xxmrgld vs1, vs2, vs3

Encoding

Binary Layout
60
0
XT
6
XA
11
XB
16
208
21
 
Format XX3-form
Opcode 0xF00000D0
Extension VSX
Registers Altered MSR

Operands

  • XT
    Target
  • XA
    Src A
  • XB
    Src B