xvrspi
VSX Vector Round to Single-Precision Integer
xvrspi XT,XB
Rounds each element of a vector from single-precision floating-point format to an integer using round to Nearest Away.
Encoding
Binary Layout
T
6:10
B
11:15
BX
16:20
TX
21:31
Operands
-
XT
Target Vector-Specific Register -
XB
Source Vector-Specific Register
Reference
View in PowerISA v3.1C Specification ↗
OPF Power ISA v3.1C
Description
For xvrspi, each element of the source vector VSR[XB] is rounded to an integer using the rounding mode Round to Nearest Away. The result is placed into the corresponding element of the target vector VSR[XT]. If a Signalling NaN is encountered, it is converted to a Quiet NaN and VXSNAN is set to 1.
Operation
if MSR.VSX=0 then VSX_Unavailable()
ex_flag ←0b0
do i = 0 to 3
reset_xflags()
src ←bfp_CONVERT_FROM_BFP32(VSR[32×BX+B].word[i])
rnd ←bfp_ROUND_TO_INTEGER(0b100, src)
vresult.word[i] ←bfp32_CONVERT_FROM_BFP(rnd)
if vxsnan_flag=1 then SetFX(FPSCR.VXSNAN)
ex_flag ←ex_flag | (FPSCR.VE & vxsnan_flag)
end
if ex_flag=0 then VSR[32×TX+T] ←vresult
Programming Note
The xvrspi instruction rounds each element of the source vector to an integer using the Round to Nearest Away mode. It handles Signalling NaNs by converting them to Quiet NaNs and setting VXSNAN in the FPSCR register. Ensure that VSX is enabled (MSR.VSX=1) before using this instruction, as attempting to use it when VSX is unavailable will result in an exception.