Floating-Point Square Root
Compute an IEEE 754 correctly rounded square root.
Floating Point
Semantics
rd = sqrt(rs1), correctly rounded per IEEE 754. All four architectures provide this directly in hardware.
| Architecture | Instructions | Expressed as | How this architecture does it |
|---|---|---|---|
| x86 | one instruction | SSE scalar forms, with packed variants and a fast reciprocal approximation (RSQRTSS) alongside. | |
| ARM | one instruction | Scalar and vector forms share the mnemonic, distinguished by register type. | |
| RISC-V | one instruction | F and D extensions, with the rounding mode selectable per instruction. | |
| PowerISA | one instruction | Double and single precision forms in the base floating-point ISA. |
Other operations
Add With Carry Atomic Compare and Swap Atomic Exchange Atomic Fetch and Add Breakpoint Trap Byte Swap (Endianness Reversal) CPU Feature Detection Cache Line Flush Cache Prefetch Hint Compare and Branch Conditional Select (Branchless Move) Count Leading Zeros Count Trailing Zeros Enable and Disable Interrupts Floating-Point Compare Function Call and Return Fused Multiply-Add Indirect Branch Instruction Cache Synchronisation Integer Addition Integer Divide Integer Multiply Integer and Floating-Point Conversion Load and Store Load-Acquire Load-Linked / Store-Conditional Logical and Arithmetic Shift Materialise a Large Constant Memory Barrier / Fence Multiply High No Operation PC-Relative Address Population Count Read Cycle Counter Return From Exception Rotate Left Sign Extend Byte Speculation Barrier Spin-Wait Hint Stack Push and Pop System Call