Function Call and Return

Jump to a subroutine and come back afterwards.

Control Flow

Semantics

The return address has to be saved somewhere. The architectures split cleanly into those that push it onto a stack in memory and those that write it into a register, which changes both the calling convention and what the branch predictor can do.

Architecture Instructions Expressed as How this architecture does it
x86 one instruction CALL pushes the return address to the stack in memory and RET pops it. The stack is architectural, which is why the return-address predictor is tied to it and why overwriting a saved return address is such a durable exploitation primitive.
ARM one instruction BL writes the return address into X30, the link register, touching no memory. A leaf function need never spill it. RET is an indirect branch through X30 that also tells the predictor this is a return, letting it pop its internal return stack.
RISC-V one instruction JAL and JALR write the return address into a register the caller names, and ret is a pseudo-instruction for JALR x0, 0(x1). Because the link register is a convention rather than an opcode, the hardware return stack is driven by which registers a sequence happens to use.
PowerISA one instruction BL writes the return address to the Link Register, a dedicated special-purpose register rather than a GPR. Return is BCLR, conventionally written blr, a conditional branch through LR.