System Call
Transfer control to the operating system at a higher privilege level.
System
Semantics
Raises privilege and vectors to a kernel entry point defined by the architecture's exception model.
| Architecture | Instructions | Expressed as | How this architecture does it |
|---|---|---|---|
| x86 | one instruction | SYSCALL is the fast 64-bit path; the older INT 0x80 software interrupt still exists for compatibility. | |
| ARM | one instruction | SVC takes an immediate and traps to EL1; HVC and SMC target the hypervisor and secure monitor. | |
| RISC-V | one instruction | One instruction for every privilege transition: where it traps depends on the current mode, not on the encoding. | |
| PowerISA | one instruction | sc traps to the supervisor, with the LEV field selecting hypervisor entry. |
Other operations
Add With Carry Atomic Compare and Swap Atomic Exchange Atomic Fetch and Add Breakpoint Trap Byte Swap (Endianness Reversal) CPU Feature Detection Cache Line Flush Cache Prefetch Hint Compare and Branch Conditional Select (Branchless Move) Count Leading Zeros Count Trailing Zeros Enable and Disable Interrupts Floating-Point Compare Floating-Point Square Root Function Call and Return Fused Multiply-Add Indirect Branch Instruction Cache Synchronisation Integer Addition Integer Divide Integer Multiply Integer and Floating-Point Conversion Load and Store Load-Acquire Load-Linked / Store-Conditional Logical and Arithmetic Shift Materialise a Large Constant Memory Barrier / Fence Multiply High No Operation PC-Relative Address Population Count Read Cycle Counter Return From Exception Rotate Left Sign Extend Byte Speculation Barrier Spin-Wait Hint Stack Push and Pop