Stack Push and Pop
Save a register to the stack and restore it.
Memory System
Semantics
The operation every function prologue performs. Whether the architecture has instructions for it, or expects the compiler to build it from ordinary stores, says a lot about how much the hardware knows about the stack.
| Architecture | Instructions | Expressed as | How this architecture does it |
|---|---|---|---|
| x86 | one instruction | Dedicated single-byte instructions with RSP implicit. The stack pointer is architectural, which is why the hardware can maintain a return-address predictor tied to it, and why stack pivoting is a durable exploitation technique. | |
| ARM | an idiom | There is no push or pop. Prologues use STP with a pre-indexed offset, storing two registers and updating SP in one instruction, so registers are saved in pairs rather than one at a time. | |
| RISC-V | an idiom | Nothing about the stack is architectural. A prologue subtracts from sp with ADDI and writes each register with an ordinary store. That sp is the stack pointer at all is an ABI convention, not something the hardware knows. | |
| PowerISA | an idiom | STDU stores and updates the base register in one instruction, which is how a frame is linked to the one below it. The back-chain pointer at the bottom of every frame is an ABI convention that this instruction makes cheap. The 32-bit STWU is the same idea at word width. |
Other operations
Add With Carry Atomic Compare and Swap Atomic Exchange Atomic Fetch and Add Breakpoint Trap Byte Swap (Endianness Reversal) CPU Feature Detection Cache Line Flush Cache Prefetch Hint Compare and Branch Conditional Select (Branchless Move) Count Leading Zeros Count Trailing Zeros Enable and Disable Interrupts Floating-Point Compare Floating-Point Square Root Function Call and Return Fused Multiply-Add Indirect Branch Instruction Cache Synchronisation Integer Addition Integer Divide Integer Multiply Integer and Floating-Point Conversion Load and Store Load-Acquire Load-Linked / Store-Conditional Logical and Arithmetic Shift Materialise a Large Constant Memory Barrier / Fence Multiply High No Operation PC-Relative Address Population Count Read Cycle Counter Return From Exception Rotate Left Sign Extend Byte Speculation Barrier Spin-Wait Hint System Call