PC-Relative Address
Compute an address relative to the program counter, without reading memory.
Data Movement
Semantics
rd = PC + offset. This is what makes position-independent code possible, so every architecture provides it, but only some can read the program counter directly.
| Architecture | Instructions | Expressed as | How this architecture does it |
|---|---|---|---|
| x86 | one instruction | LEA with RIP-relative addressing computes an address and never touches memory. Its well-known second life as a three-operand add that leaves the flags alone falls out of the same mechanism. | |
| ARM | one instruction | ADR reaches about a megabyte. ADRP gives the 4 KB page address within +/-4 GB and is paired with an ADD for the low bits, which is the standard position-independent idiom in A64. | |
| RISC-V | one instruction | AUIPC adds a 20-bit upper immediate to the PC. Paired with an ADDI, or folded into a load's own 12-bit offset, it reaches +/-2 GB in two instructions. | |
| PowerISA | an idiom | Classic PowerISA has no instruction that reads the PC. The long-standing idiom is a BL to the very next instruction followed by MFLR, using the link register as a program-counter read, which costs a return-stack mispredict. Later revisions added ADDPCIS to do it directly. |
Other operations
Add With Carry Atomic Compare and Swap Atomic Exchange Atomic Fetch and Add Breakpoint Trap Byte Swap (Endianness Reversal) CPU Feature Detection Cache Line Flush Cache Prefetch Hint Compare and Branch Conditional Select (Branchless Move) Count Leading Zeros Count Trailing Zeros Enable and Disable Interrupts Floating-Point Compare Floating-Point Square Root Function Call and Return Fused Multiply-Add Indirect Branch Instruction Cache Synchronisation Integer Addition Integer Divide Integer Multiply Integer and Floating-Point Conversion Load and Store Load-Acquire Load-Linked / Store-Conditional Logical and Arithmetic Shift Materialise a Large Constant Memory Barrier / Fence Multiply High No Operation Population Count Read Cycle Counter Return From Exception Rotate Left Sign Extend Byte Speculation Barrier Spin-Wait Hint Stack Push and Pop System Call