Byte Swap (Endianness Reversal)

Reverse the byte order of a register or of a value in memory.

Bit Manipulation

Semantics

Reverses byte significance order. PowerISA takes a different approach from the others: rather than a register-to-register swap, it provides byte-reversed LOAD and STORE instructions.

Architecture Instructions Expressed as How this architecture does it
x86 one instruction Register-to-register swap of a 32-bit or 64-bit value; MOVBE additionally swaps during a load or store.
ARM one instruction A family by granularity: REV reverses the whole register, REV16 within each halfword, REV32 within each word.
RISC-V one instruction Zbb provides REV8 for a full byte reversal; narrower reversals are composed from it.
PowerISA an idiom Takes a different approach: rather than reversing a register, the base ISA provides byte-reversed LOAD and STORE forms, so endianness is converted while crossing memory.

Other operations

Add With Carry Atomic Compare and Swap Atomic Exchange Atomic Fetch and Add Breakpoint Trap CPU Feature Detection Cache Line Flush Cache Prefetch Hint Compare and Branch Conditional Select (Branchless Move) Count Leading Zeros Count Trailing Zeros Enable and Disable Interrupts Floating-Point Compare Floating-Point Square Root Function Call and Return Fused Multiply-Add Indirect Branch Instruction Cache Synchronisation Integer Addition Integer Divide Integer Multiply Integer and Floating-Point Conversion Load and Store Load-Acquire Load-Linked / Store-Conditional Logical and Arithmetic Shift Materialise a Large Constant Memory Barrier / Fence Multiply High No Operation PC-Relative Address Population Count Read Cycle Counter Return From Exception Rotate Left Sign Extend Byte Speculation Barrier Spin-Wait Hint Stack Push and Pop System Call