Atomic Fetch and Add

Atomically add to a memory location and return its previous value.

Atomics

Semantics

atomically: old = *addr; *addr = old + v; return old.

Architecture Instructions Expressed as How this architecture does it
x86 one instruction LOCK XADD returns the previous value in the source register, which is what makes it a fetch-and-add rather than a plain atomic add.
ARM one instruction FEAT_LSE atomic instruction; it can execute near memory rather than pulling the line exclusively to the core, which scales better under contention.
RISC-V one instruction A extension AMO. The acquire and release bits are encoded in the instruction itself rather than requiring separate fences.
PowerISA an idiom Built from the same reservation loop as compare-and-swap: there is no dedicated fetch-and-add instruction.

Other operations

Add With Carry Atomic Compare and Swap Atomic Exchange Breakpoint Trap Byte Swap (Endianness Reversal) CPU Feature Detection Cache Line Flush Cache Prefetch Hint Compare and Branch Conditional Select (Branchless Move) Count Leading Zeros Count Trailing Zeros Enable and Disable Interrupts Floating-Point Compare Floating-Point Square Root Function Call and Return Fused Multiply-Add Indirect Branch Instruction Cache Synchronisation Integer Addition Integer Divide Integer Multiply Integer and Floating-Point Conversion Load and Store Load-Acquire Load-Linked / Store-Conditional Logical and Arithmetic Shift Materialise a Large Constant Memory Barrier / Fence Multiply High No Operation PC-Relative Address Population Count Read Cycle Counter Return From Exception Rotate Left Sign Extend Byte Speculation Barrier Spin-Wait Hint Stack Push and Pop System Call