Cross-Vendor GPU Concepts

73 vendor-neutral operations, each mapped to its NVIDIA PTX and AMDGPU/GFX counterparts where one has been identified.

Looking for CPUs? See the cross-ISA CPU comparison for how x86, ARM, RISC-V, and PowerISA each express the same operation.

⚠️ Cross-vendor mappings describe semantic relationships and are not guaranteed one-to-one compiler translations.
73 concepts
Concept Category Mapping Status Summary
2-Way Dot Product (Accumulate) Arithmetic equivalent with restrictions Compute a 2-element dot product of packed 16-bit values, accumulated into a 32-bit result.
24-Bit Multiply Arithmetic equivalent with restrictions Multiply two 24-bit integer values held in 32-bit registers, returning the low or high part of the product.
24-Bit Multiply-Add Arithmetic equivalent with restrictions Multiply two 24-bit integer values held in 32-bit registers and add a third 32-bit value.
2^x (Base-2 Exponential) Special-Function Approximation equivalent with restrictions Fast, reduced-precision hardware approximation of 2 raised to a floating-point power.
4-Way Dot Product (Accumulate) Arithmetic equivalent with restrictions Compute a 4-element dot product of packed 8-bit values, accumulated into a 32-bit result.
Add with Carry-In Arithmetic equivalent with restrictions Add two operands plus a carry-in from a previous add-with-carry-out, for extended-precision addition chains.
Add with Carry-Out Arithmetic equivalent with restrictions Add two operands and record the carry-out of the addition for use by a subsequent extended-precision add.
Arithmetic Shift Right Logic & Shift equivalent with restrictions Shift a signed operand's bits right by a given count, filling vacated high bits with the sign bit.
Asynchronous Global to Shared Copy Memory equivalent with restrictions Copy from global memory into shared or local memory without staging the data through registers.
Atomic Add Atomics equivalent with restrictions Atomically add a value to a memory location and (optionally) return the prior value.
Atomic Bitwise Operations Atomics equivalent with restrictions Apply AND, OR or XOR to a memory location indivisibly.
Atomic Compare-and-Swap Memory equivalent with restrictions Atomically compare a memory location to an expected value and, if equal, replace it with a new value.
Atomic Exchange Atomics equivalent with restrictions Swap a value with memory indivisibly, returning what was there.
Atomic Minimum and Maximum Atomics equivalent with restrictions Atomically replace a memory value with the smaller or larger of it and an operand.
Ballot Warp/Wavefront-Level equivalent sequence Collect a 1-bit predicate from every lane of a warp/wavefront into a single bitmask.
Bit Reverse Bit Manipulation equivalent with restrictions Reverse the order of bits in an operand.
Bit-Field Extract Bit Manipulation equivalent with restrictions Extract a contiguous bit field from an operand, zero- or sign-extending the result.
Bit-Field Insert Bit Manipulation equivalent with restrictions Insert a contiguous bit field from one operand into another at a given position.
Bitwise AND Logic & Shift equivalent with restrictions Compute the bitwise AND of two operands.
Bitwise NOT Logic & Shift equivalent with restrictions Compute the bitwise complement of an operand.
Bitwise OR Logic & Shift equivalent with restrictions Compute the bitwise OR of two operands.
Bitwise XOR Logic & Shift equivalent with restrictions Compute the bitwise exclusive-OR of two operands.
Branch Control Flow equivalent with restrictions Transfer control to a target instruction, optionally guarded by a predicate.
Byte Permute Bit Manipulation equivalent with restrictions Select and reassemble four arbitrary bytes from two source registers into a destination register.
Cache Prefetch Memory equivalent with restrictions Hint the memory system to bring a cache line into a specified cache level ahead of an anticipated access, without producing a register result.
Compare Comparison equivalent with restrictions Compare two operands and produce a boolean or predicate result.
Cosine Special-Function Approximation equivalent with restrictions Fast, reduced-precision hardware approximation of cos(x).
Count Leading Zeros Bit Manipulation equivalent with restrictions Count the number of consecutive zero bits starting from the most-significant bit.
Execution Mask Manipulation Warp/Wavefront-Level equivalent with restrictions Read or modify the mask that decides which lanes of a warp or wavefront are active.
Find Most-Significant Set Bit Bit Manipulation equivalent with restrictions Locate the highest-order bit that differs from the sign (or, for unsigned, from zero) in an operand.
Floating-Point Addition Arithmetic equivalent with restrictions Add two IEEE-754 floating-point operands.
Floating-Point Multiplication Arithmetic equivalent with restrictions Multiply two IEEE-754 floating-point operands.
Function Call Control Flow equivalent with restrictions Save a return address and transfer control to a called function.
Function Return Control Flow equivalent with restrictions Transfer control back to the address saved by the most recent call.
Funnel Shift Logic & Shift equivalent with restrictions Shift a double-width value formed by concatenating two operands, then return one word of the result.
Fused Multiply-Add Arithmetic equivalent with restrictions Compute (a * b) + c with a single rounding step instead of two.
Global-Memory Load Memory equivalent with restrictions Read a value from the device's global (main GPU) memory address space into a register.
Global-Memory Store Memory equivalent with restrictions Write a register value to the device's global memory address space.
Hyperbolic Tangent Special-Function Approximation equivalent with restrictions Fast, reduced-precision hardware approximation of tanh(x).
Integer Addition Arithmetic equivalent with restrictions Add two integer operands of matching or implied width, optionally with saturation.
Integer Multiplication Arithmetic equivalent with restrictions Multiply two integer operands, taking the low, high, or wide part of the product.
Integer Subtraction Arithmetic equivalent with restrictions Subtract one integer operand from another of matching or implied width.
Kernel/Thread Exit Control Flow equivalent with restrictions Terminate execution of the current thread or the whole kernel invocation.
Lane Shuffle Warp/Wavefront-Level equivalent with restrictions Exchange a value between lanes of the same warp/wavefront without going through memory.
Logical Shift Left Logic & Shift equivalent with restrictions Shift an operand's bits left by a given count, filling vacated low bits with zero.
Logical Shift Right Logic & Shift equivalent with restrictions Shift an unsigned operand's bits right by a given count, filling vacated high bits with zero.
Matrix Multiply (Tensor/Matrix-Core) Matrix Operations unverified Compute a small matrix-multiply-accumulate using dedicated tensor/matrix-core hardware, cooperatively across a warp/wavefront.
Maximum Arithmetic equivalent with restrictions Select the larger of two operands.
Memory Fence Synchronization equivalent sequence Order this thread's prior memory accesses relative to later ones, visible to a specified scope.
Minimum Arithmetic equivalent with restrictions Select the smaller of two operands.
Multiply-Add (Unfused) Arithmetic equivalent with restrictions Compute (a * b) + c as two separate rounding steps, unlike a fused multiply-add.
Population Count Bit Manipulation equivalent with restrictions Count the number of set (1) bits in an integer operand.
Predicated Select Comparison equivalent with restrictions Select between two operands based on a predicate/condition, without branching.
Private and Scratch Memory Access Memory equivalent with restrictions Load and store a thread's own private memory, used for register spills and indexed local arrays.
Read Lane to Scalar Register Warp/Wavefront-Level equivalent with restrictions Move a value out of one lane of a vector register into a scalar register shared by the whole wavefront.
Register Move Data Movement equivalent with restrictions Copy a value into a register, or materialize an immediate/address constant.
Shared/Local-Memory Load Memory equivalent with restrictions Read a value from on-chip, workgroup/CTA-scoped shared (local) memory.
Shared/Local-Memory Store Memory equivalent with restrictions Write a register value to on-chip, workgroup/CTA-scoped shared (local) memory.
Sign/Zero Extend Bit Manipulation equivalent with restrictions Extend a narrower bit field to a wider destination width, either sign- or zero-extending.
Special-Function Approximation Arithmetic equivalent with restrictions Fast, reduced-precision hardware approximation of a transcendental function (reciprocal, reciprocal sqrt, sin, log2, exp2, ...).
Subtract with Borrow-In Arithmetic equivalent with restrictions Subtract two operands minus a borrow-in from a previous subtract-with-borrow-out, for extended-precision subtraction chains.
Subtract with Borrow-Out Arithmetic equivalent with restrictions Subtract two operands and record the borrow-out for use by a subsequent extended-precision subtract.
Sum of Absolute Differences Arithmetic equivalent with restrictions Add the absolute difference of two operands to a third accumulator operand.
Surface/Image Load Memory equivalent with restrictions Load data from a surface/image resource using a coordinate vector, without texture filtering.
Surface/Image Query Memory equivalent with restrictions Query metadata (dimensions, format, etc.) of a surface/image resource.
Surface/Image Store Memory equivalent with restrictions Store data to a surface/image resource using a coordinate vector.
Three-Input Bitwise Logic Bit Manipulation equivalent with restrictions Compute an arbitrary bitwise boolean function of three operands, selected by a truth-table constant.
Trap Control Flow equivalent with restrictions Abort execution and signal an exception/interrupt to the host.
Type Conversion Data Movement equivalent with restrictions Convert a value between integer and/or floating-point types, with a specified rounding and saturation mode.
Uniform (Read-Only) Load Memory equivalent with restrictions Load a value from memory that is known to be identical across all threads/lanes in the group, via the scalar/uniform data path.
Warp Vote Warp/Wavefront-Level equivalent sequence Ask whether a predicate holds for all, or for any, active lanes.
Warp-Level Reduction Warp/Wavefront-Level equivalent sequence Combine one value per lane into a single result for the whole warp or wavefront.
Workgroup Barrier Synchronization equivalent with restrictions Block all threads in a workgroup/CTA at this point until every thread has arrived.