Atomic Exchange Atomics

Swap a value with memory indivisibly, returning what was there.

Vendor-Neutral Definition

old = *addr; *addr = val; return old, performed so that no other thread observes an intermediate state.
⚠️ Cross-vendor mappings describe semantic relationships and are not guaranteed one-to-one compiler translations.
equivalent with restrictions Both perform an indivisible swap. PTX expresses the address space as a modifier on one atom instruction; AMDGPU has a separate opcode per address space.
Property NVIDIA PTX AMDGPU
Instruction atom global_atomic_swap, ds_wrxchg_rtn_b32
ISA Layer Virtual Native
Data Types b32, b64, f32, f64, s32, u32, u64 b32
Version / Target Introduced PTX ISA 1.1 gfx1100

Important Differences

  • PTX writes atom.exch once and selects the space with .global or .shared. AMDGPU uses global_atomic_swap for global memory and ds_wrxchg_rtn_b32 for LDS, which are different instruction encodings rather than modifiers.
  • AMDGPU distinguishes returning from non-returning forms in the opcode: the _rtn suffix costs a destination register and a wait on the result. PTX draws that line between atom (returns) and red (does not).

Source Evidence

Verification method: documentation