Logical Shift Left Logic & Shift

Shift an operand's bits left by a given count, filling vacated low bits with zero.

Vendor-Neutral Definition

d = a << b, with zero-fill on the low end; bits shifted past the top are discarded.
⚠️ Cross-vendor mappings describe semantic relationships and are not guaranteed one-to-one compiler translations.
equivalent with restrictions Both shift left with zero-fill; AMDGPU's vector form reverses the operand order the mnemonic name implies.
Property NVIDIA PTX AMDGPU
Instruction shl v_lshlrev_b32, s_lshl_b32
ISA Layer Virtual Native
Data Types b16, b32, b64 b32
Version / Target Introduced PTX ISA 1.0 gfx1100, gfx1100

Important Differences

  • AMDGPU's vector v_lshlrev_b32 takes the shift amount as SRC0 and the value to shift as SRC1 ('rev' = reversed operand order relative to the older v_lshl_b32) - the opposite of PTX's shl d, a, b (value, then amount).
  • PTX allows a shift count wider than the type's own bit width to be well-defined per its spec; AMDGPU masks the shift amount to the low bits of the register per its own encoding - do not assume identical out-of-range behavior.

Source Evidence

Verification method: documentation