24-Bit Multiply Arithmetic
Multiply two 24-bit integer values held in 32-bit registers, returning the low or high part of the product.
Vendor-Neutral Definition
d = (a[23:0] * b[23:0]), truncated to the requested low or high 32-bit part.
⚠️ Cross-vendor mappings describe semantic relationships and are not guaranteed one-to-one compiler
translations.
equivalent with restrictions
Both compute an exact 24x24-bit integer product in a single instruction.
| Property | NVIDIA PTX | AMDGPU |
|---|---|---|
| Instruction | mul24 | v_mul_i32_i24, v_mul_u32_u24 |
| ISA Layer | Virtual | Native |
| Data Types | - | i32, u32 |
| Version / Target Introduced | PTX ISA 1.0 | gfx1100, gfx1100 |
Important Differences
- Selecting the signed vs. unsigned AMDGPU instruction must match PTX's signedness modifier on mul24; PTX's .hi form (returning the upper bits of the product) has no direct AMDGPU counterpart in this dataset since a 24x24-bit product already fits entirely in 48 bits without needing a separate high-part instruction.
Source Evidence
- Parallel Thread Execution ISA ↗ - NVIDIA Corporation
- User Guide for AMDGPU Backend ↗ - LLVM Project
Verification method: documentation