Funnel Shift Logic & Shift
Shift a double-width value formed by concatenating two operands, then return one word of the result.
Vendor-Neutral Definition
d = ((a:b) >> amount)[31:0] for a right funnel shift of the 64-bit concatenation of a and b (or the equivalent left-shifted form), letting bits from a and b blend across a single 32-bit boundary.
⚠️ Cross-vendor mappings describe semantic relationships and are not guaranteed one-to-one compiler
translations.
equivalent with restrictions
Both shift a 64-bit value formed by concatenating two 32-bit operands and return one 32-bit word of the result.
| Property | NVIDIA PTX | AMDGPU |
|---|---|---|
| Instruction | shf | v_alignbit_b32 |
| ISA Layer | Virtual | Native |
| Data Types | - | b32 |
| Version / Target Introduced | PTX ISA 3.1 | gfx1100 |
Important Differences
- PTX's shf has separate .l (left) and .r (right) forms plus .clamp/.wrap shift-amount handling; AMDGPU's v_alignbit_b32 corresponds specifically to the right-shift ('align') form - a left funnel shift needs a different AMDGPU instruction (v_alignbyte_b32-style byte-granularity variants exist but are not a direct bit-granular left-shift match) rather than the same instruction with a flipped direction.
Source Evidence
- Parallel Thread Execution ISA ↗ - NVIDIA Corporation
- "AMD Instinct MI300" Instruction Set Architecture: Reference Guide ↗ - Advanced Micro Devices, Inc.
Verification method: documentation