shf GPU Virtual ISA NVIDIA

shf Logic and Shift Instructions

shf.l.mode.b32 d, a, b, c; // left shift

Shift the 64-bit value formed by concatenating operands a and b left or right by the amount specified by the unsigned 32-bit value in c.

Encoding

PTX is a virtual instruction set. It has no single, stable native binary encoding - the compiler lowers this instruction to different native machine code depending on the selected NVIDIA target architecture (compute capability). This page intentionally shows no bit-diagram; see the target/version requirements below for what governs how this instruction compiles.
PTX ISA Version Introduced PTX ISA 3.1
Minimum Target sm_32

Syntax Forms

One mnemonic covers many type / state-space / scope / modifier combinations - each row below is an independently valid form.

Syntax Data Types State Space(s) Modifiers Min. Target Description
shf.l.mode.b32 d, a, b, c; // left shift sm_32 Shift the 64-bit value formed by concatenating operands a and b left or right by the amount specified by the unsigned 32-bit value in c. (see the official PTX ISA docs for the full description)

Operands

  • d
    Destination register
  • a
    Source operand
  • b
    Source operand
  • c; // left shift
    Operand

At a Glance

Data Types -

Related AMDGPU Concepts

Funnel Shift ↗
equivalent with restrictions
v_alignbit_b32 (AMDGPU)

Related

More in Logic and Shift Instructions

Reference

NVIDIA PTX ISA

Description

Shift the 64-bit value formed by concatenating operands a and b left or right by the amount specified by the unsigned 32-bit value in c. Operand b holds bits 63:32 and operand a holds bits 31:0 of the 64-bit source value. The source is shifted left or right by the clamped or wrapped value in c. For shf.l, the most-significant 32-bits of the result are written into d; for shf.r, the least-significant 32-bits of the result are written into d.

Semantics

u32 n = (.mode == .clamp) ? min(c, 32) : c & 0x1f; switch (shf.dir) { // shift concatenation of [b, a] case shf.l: // extract 32 msbs u32 d = (b << n) | (a >> (32-n)); case shf.r: // extract 32 lsbs u32 d = (b << (32-n)) | (a >> n); }

Sources