and GPU Virtual ISA NVIDIA

Bitwise AND Logic & Shift

and.type d, a, b;

Bitwise AND of two operands.

Encoding

PTX is a virtual instruction set. It has no single, stable native binary encoding — the compiler lowers this instruction to different native machine code depending on the selected NVIDIA target architecture (compute capability). This page intentionally shows no bit-diagram; see the target/version requirements below for what governs how this instruction compiles.
PTX ISA Version Introduced PTX ISA 1.0
Minimum Target sm_10

Syntax Forms

One mnemonic covers many type / state-space / scope / modifier combinations — each row below is an independently valid form.

Syntax Data Types State Space(s) Modifiers Min. Target Description
and.type d, a, b; b16, b32, b64, pred sm_10 Bitwise AND, including a predicate form.

Operands

  • d
    Destination register
  • a
    First operand
  • b
    Second operand

At a Glance

Data Types b16, b32, b64, pred

Reference

NVIDIA PTX ISA

Semantics

d = a & b (bitwise).

Sources