lop3 GPU Virtual ISA NVIDIA
lop3 Logic and Shift Instructions
lop3.b32 d, a, b, c, immLut;
Compute bitwise logical operation on inputs a, b, c and store the result in destination d.
Encoding
PTX is a virtual instruction set. It has no single, stable native
binary encoding - the compiler lowers this instruction to different native machine
code depending on the selected NVIDIA target architecture (compute capability).
This page intentionally shows no bit-diagram; see the target/version requirements
below for what governs how this instruction compiles.
Syntax Forms
One mnemonic covers many type / state-space / scope / modifier combinations - each row below is an independently valid form.
| Syntax | Data Types | State Space(s) | Modifiers | Min. Target | Description |
|---|---|---|---|---|---|
| lop3.b32 d, a, b, c, immLut; | sm_50 | Compute bitwise logical operation on inputs a, b, c and store the result in destination d. Optionally,. (see the official PTX ISA docs for the full description) |
Operands
-
d
Destination register -
a
Source operand -
b
Source operand -
c
Source operand -
immLut
Operand
Reference
NVIDIA PTX ISA
Description
Compute bitwise logical operation on inputs a, b, c and store the result in destination d.
Optionally,.BoolOp can be specified to compute the predicate result p by performing a
Boolean operation on the destination operand d with the predicate q in the following manner:
p = (d != 0) BoolOp q;
The sink symbol ‘_’ may be used in place of the destination operand d when.BoolOp qualifier
is specified.
The logical operation is defined by a look-up table which, for 3 inputs, can be represented as an
8-bit value specified by operand immLut as described below. (see the official PTX ISA docs for the full description)
Semantics
F = GetFunctionFromTable(immLut); // returns the function corresponding to immLut value
d = F(a, b, c);
if (BoolOp specified) {
p = (d != 0) BoolOp q;
}
Examples
lop3.b32 d, a, b, c, 0x40;
lop3.or.b32 d|p, a, b, c, 0x3f, q;
lop3.and.b32 _|p, a, b, c, 0x3f, q;Reproduced from NVIDIA's official PTX ISA documentation for technical accuracy.
Sources
-
Parallel Thread Execution ISA ↗
- NVIDIA Corporation, Chapter 9 - Instruction Set
Deep-linked directly to this instruction's section.