Global-Memory Load Memory
Read a value from the device's global (main GPU) memory address space into a register.
Vendor-Neutral Definition
d = *addr, where addr resolves in the global address space; may carry a cache-hint or coherence-scope modifier.
⚠️ Cross-vendor mappings describe semantic relationships and are not guaranteed one-to-one compiler
translations.
equivalent with restrictions
Both read a value from device global memory into a register.
| Property | NVIDIA PTX | AMDGPU |
|---|---|---|
| Instruction | ld | global_load_dword, flat_load_dword, buffer_load_dword |
| ISA Layer | Virtual | Native |
| Data Types | b16, b32, b64, b8, f16, f32, f64, s16, s32, s64, s8, u16, u32, u64, u8 | — |
| Version / Target Introduced | PTX ISA 1.0 | gfx942/gfx1100, gfx942/gfx1100, gfx942/gfx1100 |
Important Differences
- AMDGPU splits global-memory access across three related instruction families (global_*, flat_*, buffer_*) with different addressing and aperture-check behavior, where PTX exposes a single ld.global (plus generic ld with no explicit space).
Source Evidence
- Parallel Thread Execution ISA ↗ — NVIDIA Corporation
- User Guide for AMDGPU Backend ↗ — LLVM Project
Verification method: documentation