Sign/Zero Extend Bit Manipulation

Extend a narrower bit field to a wider destination width, either sign- or zero-extending.

Vendor-Neutral Definition

d = signext(a[N-1:0]) or zeroext(a[N-1:0]) to the destination width, per the signedness modifier.
⚠️ Cross-vendor mappings describe semantic relationships and are not guaranteed one-to-one compiler translations.
equivalent with restrictions Both sign- or zero-extend a narrower value to a wider destination width.
Property NVIDIA PTX AMDGPU
Instruction szext s_sext_i32_i16, s_sext_i32_i8
ISA Layer Virtual Native
Data Types - i16, i32, i8
Version / Target Introduced PTX ISA 7.6 gfx1100, gfx1100

Important Differences

  • PTX's szext takes the source bit width N as a runtime operand, extending an arbitrary N-bit field; AMDGPU's sign-extend instructions in this dataset are fixed-width (exactly 8-bit or 16-bit source only) - szext's fully general form has no single fixed-width AMDGPU instruction to match for an arbitrary N.

Source Evidence

Verification method: documentation