Fused Multiply-Add
Compute a * b + c with a single rounding of the final result.
Floating Point
Semantics
rd = round(a * b + c), rounding once rather than after the multiply and again after the add, which both improves accuracy and changes results versus separate operations.
| Architecture | Instructions | Expressed as | How this architecture does it |
|---|---|---|---|
| x86 | one instruction | The FMA3 extension encodes operand ordering in the mnemonic digits (132, 213, 231), which select which operand is multiplied and which is accumulated into. | |
| ARM | one instruction | FMADD is the scalar form with an explicit destination; FMLA is the vector multiply-accumulate. | |
| RISC-V | one instruction | The F and D extensions provide four-operand fused forms (FMADD, FMSUB, FNMADD, FNMSUB) with a genuine third source register. | |
| PowerISA | one instruction | PowerISA shipped fused multiply-add in its original 1990 design, well before it was common elsewhere, and it remains a base instruction. |
Other operations
Add With Carry Atomic Compare and Swap Atomic Fetch and Add Breakpoint Trap Byte Swap (Endianness Reversal) Cache Line Flush Cache Prefetch Hint Compare and Branch Conditional Select (Branchless Move) Count Leading Zeros Count Trailing Zeros Floating-Point Square Root Integer Addition Integer Divide Integer Multiply Load-Acquire Memory Barrier / Fence No Operation Population Count Rotate Left Sign Extend Byte System Call