Integer Addition
Add two integer registers, or a register and an immediate, into a destination register.
Arithmetic
Semantics
rd = rs1 + rs2 (or rs1 + imm), computed at the register width. The architectures differ mainly in whether the result also updates a condition/flags register.
| Architecture | Instructions | Expressed as | How this architecture does it |
|---|---|---|---|
| x86 | one instruction | ADD writes the arithmetic flags (CF, OF, SF, ZF) as a side effect; LEA is the common way to add without disturbing them. | |
| ARM | one instruction | ADD leaves flags alone; the separate ADDS form is what sets them, making flag updates explicit at the instruction level. | |
| RISC-V | one instruction | No flags exist at all, so ADD never has a side effect beyond rd. ADDI covers the immediate form. | |
| PowerISA | one instruction | add leaves CR alone; the record form add. updates condition register field CR0, following the ISA-wide '.' suffix convention. |
Other operations
Add With Carry Atomic Compare and Swap Atomic Exchange Atomic Fetch and Add Breakpoint Trap Byte Swap (Endianness Reversal) CPU Feature Detection Cache Line Flush Cache Prefetch Hint Compare and Branch Conditional Select (Branchless Move) Count Leading Zeros Count Trailing Zeros Enable and Disable Interrupts Floating-Point Compare Floating-Point Square Root Function Call and Return Fused Multiply-Add Indirect Branch Instruction Cache Synchronisation Integer Divide Integer Multiply Integer and Floating-Point Conversion Load and Store Load-Acquire Load-Linked / Store-Conditional Logical and Arithmetic Shift Materialise a Large Constant Memory Barrier / Fence Multiply High No Operation PC-Relative Address Population Count Read Cycle Counter Return From Exception Rotate Left Sign Extend Byte Speculation Barrier Spin-Wait Hint Stack Push and Pop System Call