No Operation
Do nothing, typically for alignment, padding, or patchable call sites.
System
Semantics
Architecturally does nothing except advance the program counter. On RISC-V and PowerISA it is not a distinct opcode but a canonical encoding of another instruction whose result is discarded.
| Architecture | Instructions | Expressed as | How this architecture does it |
|---|---|---|---|
| x86 | one instruction | A whole family of multi-byte NOP encodings exists so an assembler can pad to any alignment with one instruction. | |
| ARM | one instruction | A dedicated hint-space encoding, alongside related hints such as YIELD, WFE, and SEV. | |
| RISC-V | one instruction | Not a distinct opcode: NOP is the canonical assembly form of ADDI x0, x0, 0, since writes to x0 are discarded. | |
| PowerISA | one instruction | Likewise an alias: nop is ori 0,0,0. Certain other ori encodings act as priority hints to the hardware thread rather than true no-ops. |
Other operations
Add With Carry Atomic Compare and Swap Atomic Exchange Atomic Fetch and Add Breakpoint Trap Byte Swap (Endianness Reversal) CPU Feature Detection Cache Line Flush Cache Prefetch Hint Compare and Branch Conditional Select (Branchless Move) Count Leading Zeros Count Trailing Zeros Enable and Disable Interrupts Floating-Point Compare Floating-Point Square Root Function Call and Return Fused Multiply-Add Indirect Branch Instruction Cache Synchronisation Integer Addition Integer Divide Integer Multiply Integer and Floating-Point Conversion Load and Store Load-Acquire Load-Linked / Store-Conditional Logical and Arithmetic Shift Materialise a Large Constant Memory Barrier / Fence Multiply High PC-Relative Address Population Count Read Cycle Counter Return From Exception Rotate Left Sign Extend Byte Speculation Barrier Spin-Wait Hint Stack Push and Pop System Call