Count Leading Zeros

Count zero bits above the most significant set bit.

Bit Manipulation

Semantics

rd = clz(rs1). Note the semantic split: true CLZ counts leading zeros, while x86's older BSR returns the INDEX of the highest set bit and leaves the destination undefined for a zero input.

Architecture Instructions Expressed as How this architecture does it
x86 one instruction Two different operations that are easy to confuse: LZCNT (BMI1/ABM) counts leading zeros and is defined for a zero input, while the older BSR returns the bit INDEX of the highest set bit and leaves the destination undefined when the source is zero.
ARM one instruction Base instruction, defined to return the register width for a zero input.
RISC-V one instruction Zbb extension, defined to return XLEN for a zero input like ARM's, so no special case is needed. CLZW gives the 32-bit count on RV64.
PowerISA one instruction Base instruction in both 64-bit and 32-bit forms.

Other operations

Add With Carry Atomic Compare and Swap Atomic Exchange Atomic Fetch and Add Breakpoint Trap Byte Swap (Endianness Reversal) CPU Feature Detection Cache Line Flush Cache Prefetch Hint Compare and Branch Conditional Select (Branchless Move) Count Trailing Zeros Enable and Disable Interrupts Floating-Point Compare Floating-Point Square Root Function Call and Return Fused Multiply-Add Indirect Branch Instruction Cache Synchronisation Integer Addition Integer Divide Integer Multiply Integer and Floating-Point Conversion Load and Store Load-Acquire Load-Linked / Store-Conditional Logical and Arithmetic Shift Materialise a Large Constant Memory Barrier / Fence Multiply High No Operation PC-Relative Address Population Count Read Cycle Counter Return From Exception Rotate Left Sign Extend Byte Speculation Barrier Spin-Wait Hint Stack Push and Pop System Call