clz

Count Leading Zeros

CLZ <Wd>, <Wn>

Counts number of consecutive zeros.

Pseudocode Operation

count ← 0
for i = 31 downto 0
  if Wn[i] == 0 then
    count ← count + 1
  else
    break
Wd ← count

Example

CLZ w0, w1

Encoding

Binary Layout

11010110

28:21

00000

20:16

00010

15:11

9:5

4:0

Format Data Processing

Opcode 0x5AC01000

Extension Base

Operands

Wd
Destination 32-bit integer register
Wn
First source / base 32-bit integer register

Other forms of clz

clz Count Leading Zeros (Thumb)
clz Count Leading Zeros (A32)
clz Vector Count Leading Zeros

Across architectures

Count Leading Zeros : how x86, ARM, RISC-V, and PowerISA each do this.

Reference

View in Arm A64 ISA Reference ↗ Arm A64 ISA

Instruction Forms

Encoding	Instruction	ISA	Bit pattern
0x2E204800	CLZ <Vd>.<T>, <Vn>.<T>	A64	0 \| Q \| 1 \| 01110 \| size \| 10000 \| 00100 \| 10 \| Rn \| Rd
0x5AC01000	CLZ <Wd>, <Wn>	A64	0 \| 1 \| 0 \| 11010110 \| 00000 \| 00010 \| 0 \| Rn \| Rd
0xDAC01000	CLZ <Xd>, <Xn>	A64	1 \| 1 \| 0 \| 11010110 \| 00000 \| 00010 \| 0 \| Rn \| Rd
0x0419A000	CLZ <Zd>.<T>, <Pg>/M, <Zn>.<T>	A64	00000100 \| size \| 011 \| 00 \| 1 \| 101 \| Pg \| Zn \| Zd

Description

Count Leading Zeros counts the number of consecutive binary zero bits, starting from the most significant bit in the source register, and places the count in the destination register.

Operation

integer result;
bits(datasize) operand1 = X[n, datasize];

result = CountLeadingZeroBits(operand1);
X[d, datasize] = result<datasize-1:0>;

clz