asr

Arithmetic Shift Right (Register 64-bit)

ASR <Xd>, <Xn>, <Xm>

Arithmetic shift right by register value (64-bit).

Details

The Arithmetic Shift Right instruction arithmetic shift right by register value (64-bit).

Pseudocode Operation

Xd ← Xn shifted by amount

Example

ASR x0, x1, x2

Encoding

Binary Layout
10011010
110
Rm
001010
Rn
Rd
 
Format Data Processing (Register)
Opcode 0x9AC02800
Extension Base

Operands

  • Xd
    Destination 64-bit integer register
  • Xn
    First source / base 64-bit integer register
  • Xm
    Shift Reg