sha1m

SHA1 Majority (A32)

SHA1M.32 <Qd>, <Qn>, <Qm>

SHA1 hash update (Majority).

Details

SHA1 Majority function: updates SHA1 hash state by computing the Majority operation on 32-bit elements. This instruction performs a cryptographic hash round step specific to SHA1 and is part of the ARM Cryptographic Extension. No condition flags are affected. Available in A32 and T32 with Crypto extension support.

Pseudocode Operation

Qd[127:96] ← SHA1_MAJORITY(Qd[127:96], Qn[127:96], Qm[127:96])
Qd[95:64] ← SHA1_MAJORITY(Qd[95:64], Qn[95:64], Qm[95:64])
Qd[63:32] ← SHA1_MAJORITY(Qd[63:32], Qn[63:32], Qm[63:32])
Qd[31:0] ← SHA1_MAJORITY(Qd[31:0], Qn[31:0], Qm[31:0])

Example

SHA1M.32 q0, q1, q2

Encoding

Binary Layout
11110010
0
0
10
Vn
Vd
0011
N
Q
M
0
Vm
 
Format Crypto 3-Reg
Opcode 0xF2200C00
Extension Crypto

Operands

  • Qd
    State
  • Qn
    Hash
  • Qm
    Data

Reference (Arm A64 ISA)

Instruction Forms

Encoding Instruction ISA Bit pattern
0x5E002000 SHA1M <Qd>, <Sn>, <Vm>.4S A64 01011110 | 00 | 0 | Rm | 0 | 010 | 00 | Rn | Rd

Description

SHA1 hash update (majority).

Operation

AArch64.CheckFPAdvSIMDEnabled();

bits(128) x = V[d, 128];
bits(32) y = V[n, 32];    // Note: 32 not 128 bits wide
bits(128) w = V[m, 128];
bits(32) t;

for e = 0 to 3
    t = SHAmajority(x<63:32>, x<95:64>, x<127:96>);
    y = y + ROL(x<31:0>, 5) + t + Elem[w, e, 32];
    x<63:32> = ROL(x<63:32>, 30);
    <y, x> = ROL(y:x, 32);
V[d, 128] = x;