rorv

Rotate Right (Register)

RORV <Wd>, <Wn>, <Wm>

Rotates register right by variable amount.

Pseudocode Operation

shift_amount ← Wm[4:0]
Wd ← (Wn >> shift_amount) | (Wn << (32 - shift_amount))

Example

RORV w0, w1, w2

Encoding

Binary Layout

11010110

28:21

20:16

0010

15:12

11:10

9:5

4:0

Format Data Processing

Opcode 0x1AC02C00

Extension Base

Operands

Wd
Destination 32-bit integer register
Wn
First source / base 32-bit integer register
Wm
Shift Reg

Reference

View in Arm A64 ISA Reference ↗ Arm A64 ISA

Instruction Forms

Encoding	Instruction		ISA		Bit pattern
0x1AC02C00	RORV <Wd>, <Wn>, <Wm>		A64		0 \| 0 \| 0 \| 11010110 \| Rm \| 0010 \| 11 \| Rn \| Rd
0x9AC02C00	RORV <Xd>, <Xn>, <Xm>		A64		1 \| 0 \| 0 \| 11010110 \| Rm \| 0010 \| 11 \| Rn \| Rd

Description

Rotate Right Variable provides the value of the contents of a register rotated by a variable number of bits. The bits that are rotated off the right end are inserted into the vacated bit positions on the left. The remainder obtained by dividing the second source register by the data size defines the number of bits by which the first source register is right-shifted.

Operation

bits(datasize) result;
bits(datasize) operand2 = X[m, datasize];

result = ShiftReg(n, shift_type, UInt(operand2) MOD datasize, datasize);
X[d, datasize] = result;