sb

Speculation Barrier (A32)

SB

Prevents speculative execution across the barrier (v8.0).

Pseudocode Operation

// Serialize execution; prevent speculative execution across this point
SpeculationBarrier()
// All prior instructions complete before any subsequent instruction executes speculatively

Encoding

Binary Layout

111101010111

31:20

1

19

1

18

1

17

1

16

1

15

1

14

1

13

1

12

0

11

0

10

0

9

0

8

0111

7:4

0000

3:0

 

Format System Hint

Opcode 0xF57FF070

Extension A32 (v8.0)

Operands

Related

Other forms of sb

• sb Speculation Barrier

More in A32 (v8.0)

Reference

View in Arm A64 ISA Reference ↗ Arm AArch32 ISA

Instruction Forms

Encoding	Instruction		ISA		Bit pattern
0xF57FF070	SB{<q>}		A32		111101010111 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0111 | 0000
0xF3BF8F70	SB{<q>}		T32		111100111011 | 1 | 1 | 1 | 1 | 10 | 0 | 0 | 1 | 1 | 1 | 1 | 0111 | 0000

Description

Speculation Barrier is a barrier that controls speculation. The semantics of the Speculation Barrier are that the execution, until the barrier completes, of any instruction that appears later in the program order than the barrier: In particular, any instruction that appears later in the program order than the barrier cannot cause a speculative allocation into any caching structure where the allocation of that entry could be indicative of any data value present in memory or in the registers. The SB instruction: When the prediction of the instruction stream is not informed by data taken from the register outputs of the speculative execution of instructions appearing in program order after an uncompleted SB instruction, the SB instruction has no effect on the use of prediction resources to predict the instruction stream that is being fetched.

Operation

if ConditionPassed() then
    EncodingSpecificOperations();
    SpeculationBarrier();