rev

Reverse Bytes (A32)

REV<c> <Rd>, <Rm>

Reverses bytes (Endian swap).

Pseudocode Operation

value ← Rm
Rd ← (value[7:0] << 24) | (value[15:8] << 16) | (value[23:16] << 8) | value[31:24]

Example

REV r0, r2

Encoding

Binary Layout

cond

31:28

01101

27:23

0

22

11

21:20

1

19

1

18

1

17

1

16

Rd

15:12

1

11

1

10

1

9

1

8

0

7

011

6:4

Rm

3:0

 

Format Data Proc

Opcode 0x06BF0F30

Extension A32 (Base)

Operands

• Rd
  Destination general-purpose register
• Rm
  Second source / offset general-purpose register

Related

Other forms of rev

• rev SVE Reverse Vector, SVE
• rev Reverse Bytes (Thumb), T32 (Thumb)
• rev Reverse Bytes (64-bit), Base
• rev Reverse Bytes (Thumb), A32 (Base)
• rev Reverse Bytes (32-bit), Base

Across architectures

Byte Swap (Endianness Reversal) : how x86, ARM, RISC-V, and PowerISA each do this.

More in A32 (Base)

Reference

View in Arm A64 ISA Reference ↗ Arm AArch32 ISA

Instruction Forms

Encoding	Instruction		ISA		Bit pattern
0x06BF0F30	REV{<c>}{<q>} <Rd>, <Rm>		A32		cond | 01101 | 0 | 11 | 1 | 1 | 1 | 1 | Rd | 1 | 1 | 1 | 1 | 0 | 011 | Rm
0xBA00	REV{<c>}{<q>} <Rd>, <Rm>		T32		10111010 | 00 | Rm | Rd
0xFA90F080	REV{<c>}.W <Rd>, <Rm>		T32		111110101 | 001 | Rn | 1111 | Rd | 10 | 00 | Rm

Description

Byte-Reverse Word reverses the byte order in a 32-bit register.

Operation

if ConditionPassed() then
    EncodingSpecificOperations();
    bits(32) result;
    result<31:24> = R[m]<7:0>;
    result<23:16> = R[m]<15:8>;
    result<15:8>  = R[m]<23:16>;
    result<7:0>   = R[m]<31:24>;
    R[d] = result;