rev

Reverse Bytes (A32)

REV<c> <Rd>, <Rm>

Reverses bytes (Endian swap).

Details

Reverses the byte order of a 32-bit value in Rm and stores the result in Rd, performing a little-endian to big-endian (or vice versa) conversion. No condition flags are affected. This is an A32 instruction available in ARMv6 and later; it is a register-to-register operation with no writeback or memory access.

Pseudocode Operation

value ← Rm
Rd ← (value[7:0] << 24) | (value[15:8] << 16) | (value[23:16] << 8) | value[31:24]

Example

REV r0, r2

Encoding

Binary Layout
cond
01101
0
11
1
1
1
1
Rd
1
1
1
1
0
011
Rm
 
Format Data Proc
Opcode 0x06BF0F30
Extension A32 (Base)

Operands

  • Rd
    Destination general-purpose register
  • Rm
    Second source / offset general-purpose register

Reference (Arm AArch32 ISA)

Instruction Forms

Encoding Instruction ISA Bit pattern
0x06BF0F30 REV{<c>}{<q>} <Rd>, <Rm> A32 cond | 01101 | 0 | 11 | 1 | 1 | 1 | 1 | Rd | 1 | 1 | 1 | 1 | 0 | 011 | Rm
0xBA00 REV{<c>}{<q>} <Rd>, <Rm> T32 10111010 | 00 | Rm | Rd
0xFA90F080 REV{<c>}.W <Rd>, <Rm> T32 111110101 | 001 | Rn | 1111 | Rd | 10 | 00 | Rm

Description

Byte-Reverse Word reverses the byte order in a 32-bit register.

Operation

if ConditionPassed() then
    EncodingSpecificOperations();
    bits(32) result;
    result<31:24> = R[m]<7:0>;
    result<23:16> = R[m]<15:8>;
    result<15:8>  = R[m]<23:16>;
    result<7:0>   = R[m]<31:24>;
    R[d] = result;