ld1h

SVE Load Contiguous Halfwords

LD1H { <Zt>.H }, <Pg>/Z, [<Xn|SP>]

Loads halfwords from memory into a vector under predicate control.

Details

The SVE Load Contiguous Halfwords instruction loads halfwords from memory into a vector under predicate control.

Pseudocode Operation

// Loads halfwords from memory into a vector under predicate control

Example

LD1H p0/m/Z, [x1]

Encoding

Binary Layout
10100100
01
000000
Pg
Rn
Zt
 
Format SVE Load
Opcode 0xA4400000
Extension SVE

Operands

  • Zt
    Dest Vector
  • Pg
    Predicate
  • Xn
    Base Addr