pli

Preload Instruction

PLI [<Rn>, #<imm>]

Hints memory system to bring instructions into cache.

Details

Hints to the memory system that instruction code at the address Rn + imm should be preloaded into the instruction cache. No registers are modified and no exception is raised if the address is invalid; the instruction is purely advisory. No flags are affected. A32-only instruction; generates no architectural effect but may improve performance by prefetching code.

Pseudocode Operation

address ← Rn + imm12
// Preload hint for instruction cache sent to memory system; no registers modified

Example

PLI [r1, #16]

Encoding

Binary Layout
1111010
0
U
1
01
Rn
1
1
1
1
imm12
 
Format Load/Store
Opcode 0xF450F000
Extension A32 (System)

Operands

  • Rn
    First source / base general-purpose register
  • imm
    Signed immediate value

Reference (Arm AArch32 ISA)

Instruction Forms

Encoding Instruction ISA Bit pattern
0xF450F000 PLI{<c>}{<q>} [<Rn> {, #{+/-}<imm>}] A32 1111010 | 0 | U | 1 | 01 | Rn | 1 | 1 | 1 | 1 | imm12
0xF990F000 PLI{<c>}{<q>} [<Rn> {, #{+}<imm>}] T32 111110011 | 00 | 1 | Rn | 1111 | imm12
0xF910FC00 PLI{<c>}{<q>} [<Rn> {, #-<imm>}] T32 111110010 | 00 | 1 | Rn | 1111 | 1100 | imm8
0xF91FF000 PLI{<c>}{<q>} <label> T32 11111001 | U | 00 | 11111 | 1111 | imm12
0xF650F060 PLI{<c>}{<q>} [<Rn>, {+/-}<Rm> , RRX] A32 1111011 | 0 | U | 1 | 01 | Rn | 1 | 1 | 1 | 1 | 00000 | 11 | 0 | Rm
0xF650F000 PLI{<c>}{<q>} [<Rn>, {+/-}<Rm> {, <shift> #<amount>}] A32 1111011 | 0 | U | 1 | 01 | Rn | 1 | 1 | 1 | 1 | imm5 | stype | 0 | Rm
0xF910F000 PLI{<c>}{<q>} [<Rn>, {+}<Rm> {, LSL #<amount>}] T32 111110010 | 00 | 1 | Rn | 1111 | 000000 | imm2 | Rm

Description

Preload Instruction signals the memory system that instruction memory accesses from a specified address are likely in the near future. The memory system can respond by taking actions that are expected to speed up the memory accesses when they do occur, such as pre-loading the cache line containing the specified address into the instruction cache. The effect of a PLI instruction is implementation defined. For more information, see Preloading caches.

Operation

if ConditionPassed() then
    EncodingSpecificOperations();
    base = if n == 15 then Align(PC,4) else R[n];
    address = if add then (base + imm32) else (base - imm32);
    Hint_PreloadInstr(address);