sminv

SVE Signed Minimum Reduction

SMINV <Vd>, <Pg>, <Zn>.<T>

Finds min signed element in vector.

Details

The SVE Signed Minimum Reduction instruction finds min signed element in vector.

Pseudocode Operation

Vd ← min(Pg, Zn)

Example

SMINV v0.4s, p0/m, z1.s.T

Encoding

Binary Layout
00000100
sz
000011
Pg
Zn
Vd
 
Format SVE Reduction
Opcode 0x04030000
Extension SVE

Operands

  • Vd
    Dest Scalar
  • Pg
    Mask
  • Zn
    Vector