sm3tt1a
SM3 Step 2A (A32)
SM3TT1A.32 <Qd>, <Dn>, <Dm>, #<imm>
SM3 cryptographic hash step 2A.
Details
The SM3 Step 2A instruction sM3 cryptographic hash step 2A.
Pseudocode Operation
// SM3 cryptographic hash step 2A
Example
SM3TT1A.32 q0, d1, d2, #16
Encoding
Binary Layout
11111110
10
imm2
Vn
Vd
1000
N
Q
M
0
Vm
Operands
-
Qd
Destination 128-bit SIMD register -
Dn
First source 64-bit SIMD/FP register -
Dm
Second source 64-bit SIMD/FP register -
imm
Rot