bx

Branch and Exchange

BX<c> <Rm>

Branches to address in register, optionally switching ISA.

Details

Branch to address in register Rm, optionally switching between A32/T32 instruction sets based on bit[0] of Rm (0=A32, 1=T32). No flags are affected. Execution state restricted to A32; generates an Undefined Instruction exception if executed in T32.

Pseudocode Operation

if ConditionPassed() then
  new_PC ← Rm & 0xFFFFFFFE
  if (Rm & 1) == 1 then
    CPSR.T ← 1
  else
    CPSR.T ← 0
  BranchWritePC(new_PC)

Example

BX r2

Encoding

Binary Layout
cond
00010010
1
1
1
1
1
1
1
1
1
1
1
1
0001
Rm
 
Format Branch
Opcode 0x012FFF10
Extension A32 (Base)

Operands

  • Rm
    Target Reg

Reference (Arm AArch32 ISA)

Instruction Forms

Encoding Instruction ISA Bit pattern
0x012FFF10 BX{<c>}{<q>} <Rm> A32 cond | 00010010 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0001 | Rm
0x4700 BX{<c>}{<q>} <Rm> T32 01000111 | 0 | Rm | 0 | 0 | 0

Description

Branch and Exchange causes a branch to an address and instruction set specified by a register.

Operation

if ConditionPassed() then
    EncodingSpecificOperations();
    BXWritePC(R[m], BranchType_INDIR);