tsb

Trace Synchronization Barrier

TSB CSYNC

Ensures trace generation is complete.

Pseudocode Operation

TraceSynchronizationBarrier()

Encoding

Binary Layout

11010101000000110010

31:12

0010

11:8

010

7:5

11111

4:0

 

Format System Hint

Opcode 0xD503225F

Extension Trace

Operands

Related

Other forms of tsb

• tsb Trace Synchronization Barrier (A32)

More in Trace

Reference

View in Arm A64 ISA Reference ↗ Arm A64 ISA

Instruction Forms

Encoding	Instruction		ISA		Bit pattern
0xD503225F	TSB CSYNC		A64		11010101000000110010 | 0010 | 010 | 11111

Description

Trace Synchronization Barrier. This instruction is a barrier that synchronizes the trace operations of instructions, see Trace Synchronization Barrier (TSB). If FEAT_TRF is not implemented, this instruction executes as a NOP.

Operation

TraceSynchronizationBarrier();