vpush
Vector Push (VFP)
VPUSH <list>
Pushes VFP registers to the stack (Alias for VSTMDB SP!).
Pseudocode Operation
address ← SP; for each register in list (in descending order): address ← address - 4 or 8 (depending on register width); [address] ← register; SP ← address;
Example
VPUSH {r0-r3
Encoding
Binary Layout
cond
31:28
110
27:25
1
24
0
23
D
22
1
21
0
20
1101
19:16
Vd
15:12
10
11:10
10
9:8
imm8
7:0
Operands
-
list
Register List
Related
More in VFP (Float)
Reference
View in Arm A64 ISA Reference ↗
Arm AArch32 ISA
Instruction Forms
| Encoding | Instruction | ISA | Bit pattern | ||
|---|---|---|---|---|---|
| 0x0D2D0B00 | VPUSH{<c>}{<q>}{.<size>} <dreglist> | A32 | cond | 110 | 1 | 0 | D | 1 | 0 | 1101 | Vd | 10 | 11 | imm8<7:1> | 0 | ||
| 0x0D2D0A00 | VPUSH{<c>}{<q>}{.<size>} <sreglist> | A32 | cond | 110 | 1 | 0 | D | 1 | 0 | 1101 | Vd | 10 | 10 | imm8 | ||
| 0xED2D0B00 | VPUSH{<c>}{<q>}{.<size>} <dreglist> | T32 | 1110110 | 1 | 0 | D | 1 | 0 | 1101 | Vd | 10 | 11 | imm8<7:1> | 0 | ||
| 0xED2D0A00 | VPUSH{<c>}{<q>}{.<size>} <sreglist> | T32 | 1110110 | 1 | 0 | D | 1 | 0 | 1101 | Vd | 10 | 10 | imm8 |
Description
Push SIMD&FP registers to stack stores multiple consecutive registers from the Advanced SIMD and floating-point register file to the stack.