vpush

Vector Push (VFP)

VPUSH <list>

Pushes VFP registers to the stack (Alias for VSTMDB SP!).

Details

Pushes VFP floating-point registers onto the stack by decrementing SP and storing them to memory. This is an alias for VSTMDB SP! (VFP Store Multiple with pre-decrement). The condition flags (N, Z, C, V) are unaffected by this instruction. Execution is restricted to A32 and T32 instruction sets with VFP extension enabled.

Pseudocode Operation

address ← SP; for each register in list (in descending order): address ← address - 4 or 8 (depending on register width); [address] ← register; SP ← address;

Example

VPUSH {r0-r3

Encoding

Binary Layout
cond
110
1
0
D
1
0
1101
Vd
10
10
imm8
 
Format VFP Store Multiple
Opcode 0x0D2D0A00
Extension VFP (Float)

Operands

  • list
    Register List

Reference (Arm AArch32 ISA)

Instruction Forms

Encoding Instruction ISA Bit pattern
0x0D2D0B00 VPUSH{<c>}{<q>}{.<size>} <dreglist> A32 cond | 110 | 1 | 0 | D | 1 | 0 | 1101 | Vd | 10 | 11 | imm8<7:1> | 0
0x0D2D0A00 VPUSH{<c>}{<q>}{.<size>} <sreglist> A32 cond | 110 | 1 | 0 | D | 1 | 0 | 1101 | Vd | 10 | 10 | imm8
0xED2D0B00 VPUSH{<c>}{<q>}{.<size>} <dreglist> T32 1110110 | 1 | 0 | D | 1 | 0 | 1101 | Vd | 10 | 11 | imm8<7:1> | 0
0xED2D0A00 VPUSH{<c>}{<q>}{.<size>} <sreglist> T32 1110110 | 1 | 0 | D | 1 | 0 | 1101 | Vd | 10 | 10 | imm8

Description

Push SIMD&FP registers to stack stores multiple consecutive registers from the Advanced SIMD and floating-point register file to the stack.