ldrsh

Load Register Signed Halfword (A32)

LDRSH<c> <Rt>, [<Rn>, #+/-<imm>]

Loads a halfword and sign-extends it.

Details

The Load Register Signed Halfword instruction loads a halfword and sign-extends it.

Pseudocode Operation

Rt ← Memory[address]

Example

LDRSH r3, [r1, #+/-#16]

Encoding

Binary Layout
cond
000
P
U
1
W
0
Rn
Rt
imm4H
1111
imm4L
 
Format Load/Store
Opcode 0x004000F0
Extension A32 (Base)

Operands

  • Rt
    Transfer general-purpose register (load/store)
  • Rn
    First source / base general-purpose register