ttest
Transaction Test
TTEST <Xd>
Tests the transaction nesting depth.
Pseudocode Operation
Xd ← TME_NESTING_DEPTH
Xd[31:0] ← TME_STATE_AND_FAILURE_INFO
Xd[63:32] ← 0
Example
TTEST x0
Encoding
Binary Layout
1101010100100
31:19
011
18:16
0011
15:12
0001
11:8
011
7:5
Rt
4:0
Operands
-
Xd
Destination 64-bit integer register
Related
More in TME (Transactional)
Reference
View in Arm A64 ISA Reference ↗
Arm A64 ISA
Instruction Forms
| Encoding | Instruction | ISA | Bit pattern | ||
|---|---|---|---|---|---|
| 0xD5233160 | TTEST <Xt> | A64 | 1101010100100 | 011 | 0011 | 0001 | 011 | Rt |
Description
This instruction writes the depth of the transaction to the destination register, or the value 0 otherwise.
Operation
if !IsTMEEnabled() then UNDEFINED; X[t, 64] = (TSTATE.depth)<63:0>;