ttest
Transaction Test
TTEST <Xd>
Tests the transaction nesting depth.
Details
Reads the current transaction nesting depth and state into a 64-bit register. The lower bits contain the nesting depth (0 if not in a transaction), and bits 31:0 contain transaction state information including the failure reason if a prior transaction aborted. No condition flags are affected. AArch64-only; requires TME extension.
Pseudocode Operation
Xd ← TME_NESTING_DEPTH
Xd[31:0] ← TME_STATE_AND_FAILURE_INFO
Xd[63:32] ← 0
Example
TTEST x0
Encoding
Binary Layout
1101010100100
011
0011
0001
011
Rt
Operands
-
Xd
Destination 64-bit integer register
Reference (Arm A64 ISA)
Instruction Forms
| Encoding | Instruction | ISA | Bit pattern | ||
|---|---|---|---|---|---|
| 0xD5233160 | TTEST <Xt> | A64 | 1101010100100 | 011 | 0011 | 0001 | 011 | Rt |
Description
This instruction writes the depth of the transaction to the destination register, or the value 0 otherwise.
Operation
if !IsTMEEnabled() then UNDEFINED; X[t, 64] = (TSTATE.depth)<63:0>;