aesd

AES Decrypt

AESD <Vd>.<T>, <Vn>.<T>

Performs one round of AES decryption.

Details

Performs one round of AES decryption on a 128-bit vector. The instruction applies the AES InvShiftRows, InvSubBytes, and AddRoundKey transformations to the state in Vn using a round key in Vd, storing the result in Vd. This is an AArch64-only instruction requiring the Crypto extension. No condition flags are affected.

Pseudocode Operation

Vd ← AES_InvShiftRows(AES_InvSubBytes(Vn ⊕ Vd))

Example

AESD v0.4s.T, v1.4s.T

Encoding

Binary Layout
01001110
00
101000010
1
10
Rn
Rd
 
Format Crypto
Opcode 0x4E285800
Extension Crypto

Operands

  • Vd
    Data
  • Vn
    Key

Reference (Arm A64 ISA)

Instruction Forms

Encoding Instruction ISA Bit pattern
0x4E285800 AESD <Vd>.16B, <Vn>.16B A64 01001110 | 00 | 101000010 | 1 | 10 | Rn | Rd
0x4522E400 AESD <Zdn>.B, <Zdn>.B, <Zm>.B A64 01000101 | 0 | 0 | 10001 | 0 | 11100 | 1 | Zm | Zdn

Description

AES single round decryption.

Operation

AArch64.CheckFPAdvSIMDEnabled();

bits(128) operand1 = V[d, 128];
bits(128) operand2 = V[n, 128];
bits(128) result;
result = operand1 EOR operand2;
result = AESInvSubBytes(AESInvShiftRows(result));
V[d, 128] = result;