vrecpe
Vector Reciprocal Estimate
Estimates reciprocal (1/x).
Pseudocode Operation
for i = 0 to 127 by element_size:
element ← Vm[i+element_size-1:i]
Qd[i+element_size-1:i] ← RecipEstimate(element)
Example
Encoding
Operands
-
Qd
Destination 128-bit SIMD register -
Qm
Second source 128-bit SIMD register
Related
More in NEON (SIMD)
Reference
Instruction Forms
| Encoding | Instruction | ISA | Bit pattern | ||
|---|---|---|---|---|---|
| 0xF3B30400 | VRECPE{<c>}{<q>}.<dt> <Dd>, <Dm> | A32 | 111100111 | D | 11 | size | 11 | Vd | 0 | 10 | F | 0 | 0 | M | 0 | Vm | ||
| 0xF3B30440 | VRECPE{<c>}{<q>}.<dt> <Qd>, <Qm> | A32 | 111100111 | D | 11 | size | 11 | Vd | 0 | 10 | F | 0 | 1 | M | 0 | Vm | ||
| 0xFFB30400 | VRECPE{<c>}{<q>}.<dt> <Dd>, <Dm> | T32 | 111111111 | D | 11 | size | 11 | Vd | 0 | 10 | F | 0 | 0 | M | 0 | Vm | ||
| 0xFFB30440 | VRECPE{<c>}{<q>}.<dt> <Qd>, <Qm> | T32 | 111111111 | D | 11 | size | 11 | Vd | 0 | 10 | F | 0 | 1 | M | 0 | Vm |
Description
Vector Reciprocal Estimate finds an approximate reciprocal of each element in the operand vector, and places the results in the destination vector. The operand and result elements are the same type, and can be floating-point numbers or unsigned integers. For details of the operation performed by this instruction see Floating-point reciprocal square root estimate and step. Depending on settings in the CPACR, NSACR, and HCPTR registers, and the Security state and PE mode in which the instruction is executed, an attempt to execute the instruction might be undefined, or trapped to Hyp mode. For more information see Enabling Advanced SIMD and floating-point support.
Operation
if ConditionPassed() then
EncodingSpecificOperations(); CheckAdvSIMDEnabled();
for r = 0 to regs-1
for e = 0 to elements-1
if floating_point then
Elem[D[d+r],e,esize] = FPRecipEstimate(Elem[D[m+r],e,esize], StandardFPSCRValue());
else
Elem[D[d+r],e,esize] = UnsignedRecipEstimate(Elem[D[m+r],e,esize]);