uxth

Unsigned Extend Halfword (A32)

UXTH<c> <Rd>, <Rm> {, <rotation>}

Zero-extends the low halfword to 32-bits.

Details

The Unsigned Extend Halfword instruction zero-extends the low halfword to 32-bits.

Pseudocode Operation

Rd ← sign/zero-extend(Rm)

Example

UXTH r0, r2

Encoding

Binary Layout
cond
01101111
1111
Rd
rot
0111
Rm
 
Format Data Proc
Opcode 0x06FF0070
Extension A32 (Base)

Operands

  • Rd
    Destination general-purpose register
  • Rm
    Second source / offset general-purpose register