mla

Multiply Accumulate (Thumb)

MLA <Rd>, <Rm>, <Ra>, <Rn>

Rd = Rn + (Rm * Ra).

Details

Multiply Rm by Ra and accumulate the result with Rn, placing the 32-bit result in Rd. Condition flags N, Z, C, and V are not affected. This instruction is available in T32 (Thumb) and executes in all privilege levels.

Pseudocode Operation

Rd ← Rn + (Rm × Ra); result is 32-bit

Example

MLA r0, r2, r5, r1

Encoding

Binary Layout
111110110
000
Rn
Ra
Rd
00
00
Rm
 
Format Thumb Mul
Opcode 0xFB000000
Extension A32 (Base)

Operands

  • Rd
    Destination general-purpose register
  • Rm
    Second source / offset general-purpose register
  • Ra
    Accumulator general-purpose register (multiply-add)
  • Rn
    Acc

Reference (Arm AArch32 ISA)

Instruction Forms

Encoding Instruction ISA Bit pattern
0x00200090 MLA{<c>}{<q>} <Rd>, <Rn>, <Rm>, <Ra> A32 cond | 0000 | 001 | 0 | Rd | Ra | Rm | 1001 | Rn
0xFB000000 MLA{<c>}{<q>} <Rd>, <Rn>, <Rm>, <Ra> T32 111110110 | 000 | Rn | Ra | Rd | 00 | 00 | Rm

Description

Multiply Accumulate multiplies two register values, and adds a third register value. The least significant 32 bits of the result are written to the destination register. These 32 bits do not depend on whether the source register values are considered to be signed values or unsigned values. In an A32 instruction, the condition flags can optionally be updated based on the result. Use of this option adversely affects performance on many implementations.

Operation

if ConditionPassed() then
    EncodingSpecificOperations();
    operand1 = SInt(R[n]);  // operand1 = UInt(R[n]) produces the same final results
    operand2 = SInt(R[m]);  // operand2 = UInt(R[m]) produces the same final results
    addend   = SInt(R[a]);  // addend   = UInt(R[a]) produces the same final results
    result = operand1 * operand2 + addend;
    R[d] = result<31:0>;
    if setflags then
        PSTATE.N = result<31>;
        PSTATE.Z = IsZeroBit(result<31:0>);
        // PSTATE.C, PSTATE.V unchanged