prfm
Prefetch Memory (Literal)
PRFM <prfop>, <label>
Prefetches data from a PC-relative address.
Details
Prefetch Memory (Literal) signals the memory system to prefetch data from a PC-relative address. The address is calculated by adding a signed 19-bit offset (scaled by 4) to the PC. This is a hint instruction that does not architecturally affect register state or condition flags. Execution is AArch64-only.
Pseudocode Operation
address ← PC + (imm19 << 2); Prefetch(address, prfop);
Example
PRFM prfop, label
Encoding
Binary Layout
11
011
0
00
imm19
Rt
Operands
-
prfop
Type -
label
Label
Reference (Arm A64 ISA)
Instruction Forms
| Encoding | Instruction | ISA | Bit pattern | ||
|---|---|---|---|---|---|
| 0xF9800000 | PRFM (<prfop>|#<imm5>), [<Xn|SP>{, #<pimm>}] | A64 | 11 | 111 | 0 | 01 | 10 | imm12 | Rn | Rt | ||
| 0xD8000000 | PRFM (<prfop>|#<imm5>), <label> | A64 | 11 | 011 | 0 | 00 | imm19 | Rt | ||
| 0xF8A04800 | PRFM (<prfop>|#<imm5>), [<Xn|SP>, (<Wm>|<Xm>){, <extend> {<amount>}}] | A64 | 11 | 111 | 0 | 00 | 10 | 1 | Rm | option | S | 10 | Rn | Rt |
Description
Prefetch Memory (literal) signals the memory system that data memory accesses from a specified address are likely to occur in the near future. The memory system can respond by taking actions that are expected to speed up the memory accesses when they do occur, such as preloading the cache line containing the specified address into one or more caches.
The effect of a PRFM instruction is IMPLEMENTATION DEFINED. For more information, see Prefetch memory.
For information about memory accesses, see Load/Store addressing modes.
Operation
bits(64) address = PC64 + offset; Prefetch(address, t<4:0>);