sys
System Instruction
SYS #<op1>, Cn, Cm, #<op2> {, <Xt>}
Executes a system instruction (cache/TLB maintenance).
Details
Executes a system instruction that performs cache, TLB, or other system maintenance operations based on op1, Cn, Cm, and op2 fields. The optional Xt operand transfers data to/from a system register. This instruction is AArch64-only and typically requires EL1 or higher privilege level. No arithmetic flags are affected; execution may cause synchronization side effects.
Pseudocode Operation
IMPLEMENTATION_DEFINED system operation based on (op1, Cn, Cm, op2); if Xt is present then Xt ← system_register_value or system_register_value ← Xt
Example
SYS #op1, Cn, Cm, #op2
Encoding
Binary Layout
1101010100
0
01
op1
CRn
CRm
op2
Rt
Operands
-
op1
Op1 -
Cn
CRn -
Cm
CRm -
op2
Op2
Reference (Arm A64 ISA)
Instruction Forms
| Encoding | Instruction | ISA | Bit pattern | ||
|---|---|---|---|---|---|
| 0xD5080000 | SYS #<op1>, <Cn>, <Cm>, #<op2>{, <Xt>} | A64 | 1101010100 | 0 | 01 | op1 | CRn | CRm | op2 | Rt |
Description
System instruction. For more information, see Op0 equals 0b01, cache maintenance, TLB maintenance, and address translation instructions for the encodings of System instructions.
Operation
AArch64.SysInstr(1, sys_op1, sys_crn, sys_crm, sys_op2, t);