sys
System Instruction
SYS #<op1>, Cn, Cm, #<op2> {, <Xt>}
Executes a system instruction (cache/TLB maintenance).
Pseudocode Operation
IMPLEMENTATION_DEFINED system operation based on (op1, Cn, Cm, op2); if Xt is present then Xt ← system_register_value or system_register_value ← Xt
Example
SYS #op1, Cn, Cm, #op2
Encoding
Binary Layout
1101010100
31:22
0
21
01
20:19
op1
18:16
CRn
15:12
CRm
11:8
op2
7:5
Rt
4:0
Operands
-
op1
Op1 -
Cn
CRn -
Cm
CRm -
op2
Op2
Related
More in System
Reference
View in Arm A64 ISA Reference ↗
Arm A64 ISA
Instruction Forms
| Encoding | Instruction | ISA | Bit pattern | ||
|---|---|---|---|---|---|
| 0xD5080000 | SYS #<op1>, <Cn>, <Cm>, #<op2>{, <Xt>} | A64 | 1101010100 | 0 | 01 | op1 | CRn | CRm | op2 | Rt |
Description
System instruction. For more information, see Op0 equals 0b01, cache maintenance, TLB maintenance, and address translation instructions for the encodings of System instructions.
Operation
AArch64.SysInstr(1, sys_op1, sys_crn, sys_crm, sys_op2, t);