stzg

Store Allocation Tag and Zero

STZG <Xt|SP>, [<Xn|SP>, #<simm>]

Stores the Allocation Tag and zeros the data granule.

Pseudocode Operation

address ← Xn + (simm << 4)  // simm is a signed 9-bit value, scaled by 16
tag_to_store ← (Xt >> 56) & 0xF
store_tag_to_memory(address, tag_to_store)
for i = 0 to 15
  memory[address + i] ← 0

Example

STZG Xt, [x1, #-8]

Encoding

Binary Layout

11011001

31:24

01

23:22

1

21

imm9

20:12

10

11:10

Xn

9:5

Xt

4:0

 

Format Load/Store

Opcode 0xD9600800

Extension MTE (Memory Tagging)

Operands

• Xt
  Tag Src
• Xn
  First source / base 64-bit integer register
• simm
  Signed immediate offset

Related

More in MTE (Memory Tagging)

Reference

View in Arm A64 ISA Reference ↗ Arm A64 ISA

Instruction Forms

Encoding	Instruction		ISA		Bit pattern
0xD9600400	STZG <Xt|SP>, [<Xn|SP>], #<simm>		A64		11011001 | 01 | 1 | imm9 | 01 | Xn | Xt
0xD9600C00	STZG <Xt|SP>, [<Xn|SP>, #<simm>]!		A64		11011001 | 01 | 1 | imm9 | 11 | Xn | Xt
0xD9600800	STZG <Xt|SP>, [<Xn|SP>{, #<simm>}]		A64		11011001 | 01 | 1 | imm9 | 10 | Xn | Xt

Description

Store Allocation Tag, Zeroing stores an Allocation Tag to memory, zeroing the associated data location. The address used for the store is calculated from the base register and an immediate signed offset scaled by the Tag granule. The Allocation Tag is calculated from the Logical Address Tag in the source register. This instruction generates an Unchecked access.

Operation

bits(64) address;

if n == 31 then
    CheckSPAlignment();
    address = SP[];
else
    address = X[n, 64];

AccessDescriptor accdesc = CreateAccDescLDGSTG(MemOp_STORE, FALSE);

if !postindex then
    address = GenerateAddress(address, offset, accdesc);

if !IsAligned(address, TAG_GRANULE) then
    AArch64.Abort(address, AlignmentFault(accdesc));

Mem[address, TAG_GRANULE, accdesc] = Zeros(TAG_GRANULE * 8);

bits(64) data = if t == 31 then SP[] else X[t, 64];
bits(4) tag = AArch64.AllocationTagFromAddress(data);
AArch64.MemTag[address, accdesc] = tag;

if writeback then
    if postindex then
        address = GenerateAddress(address, offset, accdesc);

    if n == 31 then
        SP[] = address;
    else
        X[n, 64] = address;