fnmadd
Floating-Point Fused Negated Multiply-Add (Scalar)
FNMADD <Hd|Sd|Dd>, <Hn|Sn|Dn>, <Hm|Sm|Dm>, <Ha|Sa|Da>
Calculates -((Vn * Vm) + Va).
Details
The Floating-Point Fused Negated Multiply-Add instruction calculates -((Vn * Vm) + Va).
Pseudocode Operation
Vd ← Vn + Vm
// Flags affected: N, Z, C, V
Example
FNMADD Dd, Dn, Dm, Da
Encoding
Binary Layout
00011111
type
Rm
0
Ra
Rn
Rd
Operands
-
Vd
Destination SIMD/FP vector register -
Vn
First source SIMD/FP vector register -
Vm
Second source SIMD/FP vector register -
Va
Addend