mcr

Move to Coprocessor from Register (A32)

MCR<c> <coproc>, <opc1>, <Rt>, <CRn>, <CRm>{, <opc2>}

Writes a general-purpose register to a coprocessor register (e.g., CP15).

Details

Moves data from a general-purpose register into a coprocessor register (typically CP15 for system control). The instruction is conditional and executes only if the condition code is satisfied. No ARM condition flags (N, Z, C, V) are modified by this instruction. This is an A32-only instruction with implementation-specific side effects depending on the target coprocessor register.

Pseudocode Operation

if ConditionPassed(cond) then
  CP[coproc, opc1, CRn, CRm, opc2] ← Rt

Example

MCR p15, 0, r3, c1, c2

Encoding

Binary Layout
cond
1110
opc1
0
CRn
Rt
111
coproc<0>
opc2
1
CRm
 
Format Coprocessor
Opcode 0x0E000E10
Extension A32 (System)

Operands

  • coproc
    CP Num
  • Rt
    Transfer general-purpose register (load/store)
  • CRn
    Dest CP Reg

Reference (Arm AArch32 ISA)

Instruction Forms

Encoding Instruction ISA Bit pattern
0x0E000E10 MCR{<c>}{<q>} <coproc>, {#}<opc1>, <Rt>, <CRn>, <CRm>{, {#}<opc2>} A32 cond | 1110 | opc1 | 0 | CRn | Rt | 111 | coproc<0> | opc2 | 1 | CRm
0xEE000E10 MCR{<c>}{<q>} <coproc>, {#}<opc1>, <Rt>, <CRn>, <CRm>{, {#}<opc2>} T32 11101110 | opc1 | 0 | CRn | Rt | 111 | coproc<0> | opc2 | 1 | CRm

Description

Move to System register from general-purpose register or execute a System instruction. This instruction copies the value of a general-purpose register to a System register, or executes a System instruction. The System register and System instruction descriptions identify valid encodings for this instruction. Other encodings are undefined. For more information see About the AArch32 System register interface and General behavior of System registers. In an implementation that includes EL2, MCR accesses to System registers can be trapped to Hyp mode, meaning that an attempt to execute an MCR instruction in a Non-secure mode other than Hyp mode, that would be permitted in the absence of the Hyp trap controls, generates a Hyp Trap exception. For more information, see EL2 configurable instruction enables, disables, and traps. Because of the range of possible traps to Hyp mode, the MCR pseudocode does not show these possible traps.

Operation

if ConditionPassed() then
    EncodingSpecificOperations();
    AArch32.SysRegWrite(cp, ThisInstr(), t);