mcr
Move to Coprocessor from Register (A32)
Writes a general-purpose register to a coprocessor register (e.g., CP15).
Pseudocode Operation
if ConditionPassed(cond) then
CP[coproc, opc1, CRn, CRm, opc2] ← Rt
Example
Encoding
Operands
-
coproc
CP Num -
Rt
Transfer general-purpose register (load/store) -
CRn
Dest CP Reg
Related
More in A32 (System)
Reference
Instruction Forms
| Encoding | Instruction | ISA | Bit pattern | ||
|---|---|---|---|---|---|
| 0x0E000E10 | MCR{<c>}{<q>} <coproc>, {#}<opc1>, <Rt>, <CRn>, <CRm>{, {#}<opc2>} | A32 | cond | 1110 | opc1 | 0 | CRn | Rt | 111 | coproc<0> | opc2 | 1 | CRm | ||
| 0xEE000E10 | MCR{<c>}{<q>} <coproc>, {#}<opc1>, <Rt>, <CRn>, <CRm>{, {#}<opc2>} | T32 | 11101110 | opc1 | 0 | CRn | Rt | 111 | coproc<0> | opc2 | 1 | CRm |
Description
Move to System register from general-purpose register or execute a System instruction. This instruction copies the value of a general-purpose register to a System register, or executes a System instruction. The System register and System instruction descriptions identify valid encodings for this instruction. Other encodings are undefined. For more information see About the AArch32 System register interface and General behavior of System registers. In an implementation that includes EL2, MCR accesses to System registers can be trapped to Hyp mode, meaning that an attempt to execute an MCR instruction in a Non-secure mode other than Hyp mode, that would be permitted in the absence of the Hyp trap controls, generates a Hyp Trap exception. For more information, see EL2 configurable instruction enables, disables, and traps. Because of the range of possible traps to Hyp mode, the MCR pseudocode does not show these possible traps.
Operation
if ConditionPassed() then
EncodingSpecificOperations();
AArch32.SysRegWrite(cp, ThisInstr(), t);